{
    "id":"/axapi/v3/system/deep-hrxq",
    "type":"object",
    "node-type":"scalar",
    "title":"deep-hrxq",
    "operation-not-allowed": ["PUT"],
    "partition-visibility":"shared",
    "operational":1,
    "auto-created-object":1,
    "description":"Enable or disable FPGA Deep HRXQ deepth settings ",
    "properties":{
        "enable":{
            "type":"number",
            "format":"flag",
            "default":0,
            "partition-visibility":"shared",
            "optional":true
        },
        "hrxq_num_chunks":{
            "type":"string",
            "format":"enum",
            "default":"2048",
            "partition-visibility":"shared",
            "description":"'2048': Set FPGA Deep HRXQ depth as 2048 per CPU; '1024': Set FPGA Deep HRXQ depth as 1024 per CPU; '512': Set FPGA Deep HRXQ depth as 512 per CPU; ",
            "enum":[
                "2048",
                "1024",
                "512"
            ],
            "optional":true
        }
    }
}