a10_system_control_cpu

Synopsis

System control cpu information

Parameters

Parameters

Choices/Defaults

Comment

state

str/required

[‘noop’, ‘present’, ‘absent’]

State of the object to be created.

ansible_host

str/required

Host for AXAPI authentication

ansible_username

str/required

Username for AXAPI authentication

ansible_password

str/required

Password for AXAPI authentication

ansible_port

int/required

Port for AXAPI authentication

a10_device_context_id

int

[‘1-8’]

Device ID for aVCS configuration

a10_partition

str

Destination/target partition for object/command

uuid

str

uuid of the object

stats

dict

Field stats

ctrl_cpu_number

str

Number of ctrl cpus

cpu_1

str

Control CPU-1

cpu_2

str

Control CPU-2

cpu_3

str

Control CPU-3

cpu_4

str

Control CPU-4

cpu_5

str

Control CPU-5

cpu_6

str

Control CPU-6

cpu_7

str

Control CPU-7

cpu_8

str

Control CPU-8

cpu_9

str

Control CPU-9

cpu_10

str

Control CPU-10

cpu_11

str

Control CPU-11

cpu_12

str

Control CPU-12

cpu_13

str

Control CPU-13

cpu_14

str

Control CPU-14

cpu_15

str

Control CPU-15

cpu_16

str

Control CPU-16

cpu_17

str

Control CPU-17

cpu_18

str

Control CPU-18

cpu_19

str

Control CPU-19

cpu_20

str

Control CPU-20

cpu_21

str

Control CPU-21

cpu_22

str

Control CPU-22

cpu_23

str

Control CPU-23

cpu_24

str

Control CPU-24

cpu_25

str

Control CPU-25

cpu_26

str

Control CPU-26

cpu_27

str

Control CPU-27

cpu_28

str

Control CPU-28

cpu_29

str

Control CPU-29

cpu_30

str

Control CPU-30

cpu_31

str

Control CPU-31

cpu_32

str

Control CPU-32

cpu_33

str

Control CPU-33

cpu_34

str

Control CPU-34

cpu_35

str

Control CPU-35

cpu_36

str

Control CPU-36

cpu_37

str

Control CPU-37

cpu_38

str

Control CPU-38

cpu_39

str

Control CPU-39

cpu_40

str

Control CPU-40

cpu_41

str

Control CPU-41

cpu_42

str

Control CPU-42

cpu_43

str

Control CPU-43

cpu_44

str

Control CPU-44

cpu_45

str

Control CPU-45

cpu_46

str

Control CPU-46

cpu_47

str

Control CPU-47

cpu_48

str

Control CPU-48

cpu_49

str

Control CPU-49

cpu_50

str

Control CPU-50

cpu_51

str

Control CPU-51

cpu_52

str

Control CPU-52

cpu_53

str

Control CPU-53

cpu_54

str

Control CPU-54

cpu_55

str

Control CPU-55

cpu_56

str

Control CPU-56

cpu_57

str

Control CPU-57

cpu_58

str

Control CPU-58

cpu_59

str

Control CPU-59

cpu_60

str

Control CPU-60

cpu_61

str

Control CPU-61

cpu_62

str

Control CPU-62

cpu_63

str

Control CPU-63

cpu_64

str

Control CPU-64

Status

  • This module is not guaranteed to have a backwards compatible interface. [preview]

  • This module is maintained by community.

Authors

  • A10 Networks 2021